Spectraforce Technologies seeks a Design Verification Engineer III for a 6-month onsite role in Sunnyvale, CA. Responsibilities include developing DV plans, building SystemVerilog/UVM testbenches, and driving coverage closure across IPs and subsystems.
The candidate will perform power/performance measurements using PPA RTL tools, triage RTL regressions, and contribute to automation via Python. BS in EE/CS required; MS preferred.
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