TPU ASIC Design Verification Engineer

Google LLC in Sunnyvale is hiring an ASIC Design Verification Engineer to shape TPU technology that powers AI/ML workloads. You will verify complex digital blocks and develop constrained-random test environments using SystemVerilog and UVM, collaborating across the verification lifecycle with design teams.

The role emphasizes contributing to the verification of TPU architecture within AI/ML-infused systems, with in-person interviews required in most cases.