K2 Space in Seattle is hiring an ASIC Design Verification Engineer to verify custom silicon. You will shape verification strategy, build SystemVerilog/UVM test benches, write SVA, and drive coverage closure in a hands-on, high-ownership role across architecture, RTL, DFT, firmware, and silicon validation teams.
The role emphasizes regression management, simulations, and rigorous debugging in a fast-paced space technology environment with equity compensation.
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