Silicon Engineer, Infrastructure Validation

Meta is building custom silicon to power the infrastructure that underlies its family of products and services at global scale. Infrastructure Silicon delivers scalable, reliable custom ASIC solutions for Meta's data center needs and getting from first silicon to fleet-scale production requires a systems-based approach to validation and bring-up.

Our teams work across the full silicon lifecycle, from early architecture and design inputs, pre-silicon validation on simulation and emulation platforms, first-silicon bring-up, post-silicon characterization across process, voltage, and temperature corners, and productization into large fleets. We write tests, build bare-metal environments and reusable frameworks that scale from pre-silicon platforms to production deployments, and we build the automation that lets us do it at volume and velocity.

Requirements

• Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
• Degree must be completed prior to joining Meta.
• 2+ years of experience in ASIC or SoC development, validation, or first-silicon bring-up.
• Experience writing test cases or validation scripts in Python, C/C++, System Verilog, or a comparable language.
• Experience with troubleshooting, debug and analysis of silicon products, including hardware debug tooling such as logic analyzers, oscilloscopes, JTAG interfaces, or protocol analyzers.
• Experience collaborating with RTL design or physical design, firmware or systems teams to reproduce and resolve silicon issues.
• Experience across the silicon lifecycle for data center applications such as AI/ML or networking.
• Experience validating high-speed interfaces such as PCIe, DDR, HBM, Ethernet, or SerDes in a data center or server silicon context.
• Experience with emulation or prototyping platforms used for pre-silicon validation.
• Exposure to power management validation, including DVFS characterization and low-power state verification on custom silicon.
• Familiarity with UVM-based verification environments and functional coverage closure techniques.
• Experience developing diagnostics frameworks, low-level kernels, or bare-metal test environments for silicon validation.
• Experience with Linux systems, server systems management, and embedded bus protocols such as I2C, SPI, USB, or PCIe.
• Experience with silicon productization, manufacturing test, or fleet-scale deployment.