Apple Inc. in Sunnyvale seeks a Signoff Engineer to verify and analyze complex mixed-signal designs before tapeout, applying power EM, EMIR, and gate/transistor level signoff methodologies.
You will help define requirements and collaborate with Design, CAD, and Technology teams to ensure robust signoff flows. The role requires a BS with 10+ years in CAD/EMIR roles, and expertise in tools like Redhawk, Voltus, Totem, plus scripting (Python/Perl).
#J-18808-LjbffrSignoff CAD Engineer - AI-Driven SoC Power & EM Analysis in sunnyvale at Unknown Company
This position is listed as full time and onsite.