Synopsys Inc is seeking an experienced ASIC Digital Signoff Engineer in sunny California. As part of the IP Digital Design Methodology team, you will define ASIC design standards and collaborate globally on cutting-edge digital IP cores.
The ideal candidate will possess over 12 years of hands-on experience, particularly in Static Timing Analysis and EM/IR flows, showcasing strong problem-solving skills and technical documentation abilities. Join us to contribute to the next generation of technology.
#J-18808-LjbffrSenior STA & Sign-Off Engineer, High-Speed IP in sunnyvale at Unknown Company
This position is listed as full time and onsite.