Senior SoC Verification Engineer — PCIe/UVM & IP

A technology company located in Mountain View, CA is seeking a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. The role involves collaboration with design and architecture teams to verify complex digital systems. The ideal candidate will have over 5 years of SoC Design Verification experience and strong skills in SystemVerilog and UVM. This position offers a full-time employment opportunity with a salary range between $119,800 and $258,000.
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