Google seeks a Senior RTL Design Engineer in Sunnyvale to drive AI/ML hardware innovation. You'll design RTL IP for TPU technology, contributing to unique solutions for Google's advanced applications.
Expect responsibilities in microarchitecture specifications, SystemVerilog development, and collaboration with design and physical teams. Ideal candidates have a strong ASIC design background and a Bachelor's in a related field.
Compensation includes a competitive salary, bonus, equity, and comprehensive benefits.
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