Google is seeking an ASIC Design Verification Technical Lead to shape verification strategies for TPU architecture and AI accelerators. You will drive emulation and post-silicon correlation, define verification architectures, and ensure RTL meets our architectural goals in high-speed DSP pipelines.
You will lead co-simulation, coverage, and method improvements across pre- and post-silicon stages, collaborating with DSP and algorithm teams to deliver robust digital designs for Google's data
#J-18808-LjbffrSenior ASIC Verification Lead for AI Accelerators in sunnyvale at Unknown Company
This position is listed as full time and onsite.