Blue Origin in Seattle is seeking a Senior Silicon Physical Design Engineer to drive RTL-to-GDS flow for space-grade SoCs, including synthesis, floorplanning, power/clock, and timing closure. The role requires 7+ years in ASIC physical design and proficiency with Cadence, Synopsys, Siemens or Mentor tool flows, plus Python/Tcl/Makefiles.
Responsibilities include signoff (STA, PV, LEC, EM/IR), timing closure, DFT, and collaboration with front-end and analog/mixed-signal teams.
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