Experience & Education
- 4+ years in design, verification, simulation, emulation and prototyping of electronics chips and systems
- BS or MS in EE, CE, CS or related areas
Technical:
- Experience with an Emulation platform (Veloce, Palladium, Zebu) is preferred
- SystemVerilog, Verilog and/or VHDL RTL design
- Verification experience with SystemVerilog, SystemC and/or C/C++
- ASIC and/or FPGA implementation experience is a plus
- Debug of RTL designs and simulation
- Proficient in scripting languages (e.g., Perl, Python, various shell scripts/Makefiles, XML, JSON, etc.)
- Competitive personality driven to win, ethically, in a competitive business situations
- Good communication and inter-personal skills
- Ability to create and deliver product demos live, via internet, or recorded
- Ability to create and deliver product presentations focused on functionality and value differentiation
- Ability to travel domestically and internationally. Travel includes customer meetings as well as visits to other Siemens EDA R&D sites.