Mixed-Signal Verification Engineer — Analog/RF Modeling

Apple Inc. in Sunnyvale seeks a Design Verification Engineer to verify functionality and performance of Apple’s premier SoCs. The role focuses on RNM/SystemVerilog behavioral modeling for analog/RF blocks inside a large SoC, with self-checking models and AMS environment setup alongside analog designers.

You will own modeling tasks, develop assertions, and ensure specs are met while collaborating across the hardware team to deliver high-quality verification results.