Lead RTL Architect for ASIC/SoC

A semiconductor startup in Sunnyvale is seeking an RTL Design Tech Lead to oversee micro-architecture and RTL development for complex ASIC/SoC programs. This role requires deep design expertise and technical leadership to guide teams through the architecture and tapeout phases. Ideal candidates will have extensive experience in ASIC/SoC RTL design, strong knowledge of SystemVerilog, and proven track records in project leadership and silicon success. The compensation ranges between $220,000 to $250,000 per year.
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