Impactful SoC DV Engineer – Wireless & Tape-out Ready

Apple Inc. seeks a Design Verification Engineer to verify pre-silicon RTL for block and top-level SoC in a wireless silicon environment.

You will architect UVM-based testbenches, integrate complex VIPs, and drive coverage-driven verification with multi-team collaboration across DV, architecture, firmware, and IP delivery groups. Lead efforts on low-power/clock domains and high-speed interfaces like PCIe, AXI/NOC, and memory subsystems.