Hewlett Packard Enterprise in Sunnyvale, CA seeks a Senior Design Verification Engineer specializing in emulation-based verification to drive system-level verification ahead of silicon tape-out. You will build robust UVM testbenches, run constrained-random tests, and validate with emulation platforms such as Palladium/ZeBu/Veloce.
The role emphasizes collaboration with design and validation teams, coverage goals, and early software bring-up on hardware accelerators in a hybrid work model.
#J-18808-LjbffrHybrid Senior Design Verification Engineer (Emulation) in sunnyvale at Unknown Company
This position is listed as full time and hybrid.