Description
NextSilicon is reimagining high-performance computing. Our accelerated compute solutions leverage intelligent adaptive algorithms to vastly accelerate supercomputers, driving them forward into a new generation. Our new software-defined hardware architecture enables HPC to fulfill its promise of breakthroughs in all fields of advanced research.
At NextSilicon, everything we do is guided by three core values:
Location : Hybrid in either our Austin, TX or Minneapolis, MN offices (or willing to relocate) preferred but Remote considered for exceptional candidates.
As part of a software-defined hardware company, you will play a pivotal role in driving new software features based on your analysis of customer-defined applications and measuring the resulting performance improvements. This role stands on the edge of computer science/architecture and scientific applications which span a wide range of fields, including but not limited to graph algorithms, sparse computations, weather prediction, seismic imaging, genomics, molecular dynamics, quantum chemistry, and computational fluid dynamics. If you have a passion for science, a knack for solving complex problems, and thrive in a bleeding-edge multidisciplinary environment, we want to hear from you!
Requirements
NextSilicon is reimagining high-performance computing. Our accelerated compute solutions leverage intelligent adaptive algorithms to vastly accelerate supercomputers, driving them forward into a new generation. Our new software-defined hardware architecture enables HPC to fulfill its promise of breakthroughs in all fields of advanced research.
At NextSilicon, everything we do is guided by three core values:
- Professionalism : We strive for exceptional results through professionalism and unwavering dedication to quality and performance.
- Unity : Collaboration is key to success. That's why we foster a work environment where every employee can feel valued and heard.
- Impact : We're passionate about developing technologies that make a meaningful impact on industries, communities, and individuals worldwide.
Location : Hybrid in either our Austin, TX or Minneapolis, MN offices (or willing to relocate) preferred but Remote considered for exceptional candidates.
As part of a software-defined hardware company, you will play a pivotal role in driving new software features based on your analysis of customer-defined applications and measuring the resulting performance improvements. This role stands on the edge of computer science/architecture and scientific applications which span a wide range of fields, including but not limited to graph algorithms, sparse computations, weather prediction, seismic imaging, genomics, molecular dynamics, quantum chemistry, and computational fluid dynamics. If you have a passion for science, a knack for solving complex problems, and thrive in a bleeding-edge multidisciplinary environment, we want to hear from you!
Requirements
- Bachelor of Science in an engineering discipline (computer science, mathematics, natural sciences or engineering) with a significant focus on scientific computing
- Masters or Ph.D. with relevant specialization is a plus
- A strong parallel programming experience using both MPI and OpenMP is required
- Hands-on experience with development in one or more HPC application domains
- Hands-on experience with one or more AI/ML frameworks, such as PyTorch
- Proficiency in C/C++ and/or Fortran
- Ability to measure application-level performance and profile HPC applications at the node level and at scale
- Expertise in competitive performance analysis is strongly preferred
- Willingness to travel as necessary
- US citizenship with eligibility to visit US government research facilities
- Profile and identify bottlenecks of a wide range of HPC applications on different architectures
- Develop creative algorithmic and software solutions to solve bottlenecks and accelerate applications on a novel dataflow architecture
- Translate application requirements into software features and hardware requirements
- Develop performance models for future hardware architectures