HBM Interface Architect for High-Performance Memory

Micron Technology, Inc. is seeking a senior engineer to own and deliver critical HBM IO blocks and subsystems from architectural definition through silicon bring-up.

You will define HBM PHYs, die-to-die interfaces, training and power-management, coordinating with architecture, design, and package teams across 2.5D/3D systems. The role requires deep knowledge of DRAM operation, HBM/DDR interfaces, and JEDEC specs, with leadership across multidisciplinary teams to drive pre/post-silicon debugging