We are looking for a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. This role involves close collaboration with design and architecture teams to verify complex digital systems.
Responsibilities
- Develop and execute SoC and IP-level verification using SystemVerilog and UVM
- Verify UCIe , Ethernet MAC & PCS , and PCIe designs
- Support PCIe Root of Trust verification, including Rambus IP
- Create verification plans, tests, assertions, and coverage
- Debug issues and drive verification closure
Requirements
- BS/MS in EE, CE, or related field
- 5+ years of SoC Design Verification experience
Seniority Level
Mid-Senior level
Employment Type
Full-time
Industry
Semiconductor Manufacturing
Location
Mountain View, CA
Salary
$119,800.00 – $258,000.00
#J-18808-Ljbffr