Adv ASIC FPGA Eng 3

Job Duties

Check out this new opportunity!

ASIC/FPGA Engineer

Bloomington, MN

Pay Estimated: $80.81 - $85.81/Hour

U.S. Citizenship is required by Federal Law

We are hiring a Mid-Level ASIC/FPGA Design Engineer in Bloomington, MN, to support advanced defense and aerospace digital hardware development programs. This role focuses on ASIC and FPGA design, verification, simulation, synthesis, timing analysis, power optimization, and hardware validation, supporting mission-critical embedded electronics and next-generation defense technologies. U.S. citizenship is required, and candidates must be eligible to obtain a DoD Secret security clearance.

Responsibilities:

Define, design, verify, and document ASIC and/or FPGA developments.

Determine architecture, system simulation strategy, and detailed design approach.

Define module interfaces and device-level design and simulation requirements.

Evaluate development flow, including high-level design, synthesis, place and route, timing analysis, and power utilization.

Create test and simulation plans to establish functional criteria.

Verify test results, analyze performance, and document findings.

Review vendor capabilities, foundry technologies, device libraries, and simulation tools as needed.

Support technical engineering products using appropriate standards, processes, procedures, and tools.

Research and analyze design specifications, customer proposals, and technical documentation to determine design feasibility.

Select components and equipment based on specifications, performance, and reliability requirements.

Contribute to ASIC/FPGA organizational process improvements, including opportunities to apply AI for continuous improvement and innovation.

Plan and execute project tasks supporting major programs and engineering initiatives.

Provide technical leadership or guidance to lower-level engineers as needed.

Qualifications:

U.S. Citizenship is required by Federal Law

Bachelor's degree in Electrical Engineering, Computer Engineering, Science, Engineering, Mathematics, or a related technical field with 5+ years of relevant experience; or Master's degree with 3+ years of relevant experience.

Ability to obtain a Department of Defense Secret security clearance at time of hire.

Experience with ASIC and/or FPGA design, verification, simulation, and documentation.

Proficiency with ASIC/FPGA development processes, including synthesis, place and route, timing, power analysis, and design validation.

Experience using ASIC/FPGA design tools and Microsoft Office applications.

Knowledge of related engineering disciplines, vendor capabilities, foundry technologies, device libraries, and simulation tools.

Ability to independently determine technical approaches and contribute to major programs or projects.

Experience interfacing with engineering teams, project leaders, senior technical staff, and external customers.

Moseley Technical Services, Inc. is an AA/EEO/Veterans/Disabled Employer

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What to Expect

Applicants selected for employment will be required to pass a pre-employment drug screening and background investigation, which may include education, criminal, and work history verifications.

Accepted applicants will be eligible for benefits, including medical and supplemental insurance, and a 401(k) plan. Appreciation and gratitude for employees are hallmarks of organizations with low turnover.

Final position level and pay will be based on experience.

Resources

To apply, send a resume to:

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For more information about Moseley, visit: About Us

Moseley Technical Services, Inc. (Moseley) was incorporated in 1994 to provide engineering and professional services to the aerospace/defense, manufacturing, government, and commercial industries. Our Mission is to deliver superior service to our customers and employees. We have been successful in our vision by building long-term relationships with customers and employees through integrity, transparency, and appreciation.

We stand by our 30-year-old commitment of "World Class Service. World Class Company."

Apply here:

Minimum Education Required

Not Specified

Minimum Experience Required

Not Specified

Shift

First (Day)

Number of Openings

1

Compensation

$80.81 - $85.81 / Hourly

Postal Code

55431

Job Type

Full Time

Place of Work

On-site

Requisition ID

37346

Job Benefits

See job description