Astera Labs seeks a VP of Physical Design to lead full-chip physical design for next‑gen switching products with UCIe/UALink. You will mentor a growing team, establish flows, and ensure tapeouts meet aggressive performance, power and area targets.
You will collaborate with architecture, digital, packaging, and silicon teams to drive timing closure and manufacturability across multiple concurrent projects.
#J-18808-LjbffrVP of Physical Design – Multi-Chiplet AI Switching in san jose at Unknown Company
This position is listed as full time and onsite.