What You'll Do
- Lead and grow a world-class IC design team across analog, mixed-signal, RF, and digital domains
- Own the end-to-end chip lifecycle-from concept to GDSII to bring-up and production
- Set architectural direction and technical standards across IC design projects
- Work cross-functionally with hardware, firmware, and product teams to translate chip performance into real-world applications
- Guide vendor/EDA tool engagement, IP integration, and tapeout execution
- Hire, mentor, and retain exceptional engineering talent
- Represent engineering in executive strategy discussions and technical partnerships
What We're Looking For
Required:
- 10-20 years of experience in analog and mixed-signal IC design
- Demonstrated leadership in taking chips from first spec to high-yield production
- Deep expertise in design for low-power, wireless, or wearable applications
- Experience leading and scaling high-performance engineering teams
- Strategic thinker with a hands-on approach to solving engineering challenges
Preferred:
- Tapeout experience in startups or product-first environments
- Familiarity with system-level design and integration including firmware/hardware co-design
- Strong communication and stakeholder management skills
- A track record of mentorship and team development
Compensation & Benefits
- Base Salary: $180,000 - $250,000 per annum ≈ $340k - $480k Bay Area equivalent after cost of living
- + Performance bonus + meaningful early-stage equity
- Relocation bonus, partner job-search help
- Full visa sponsorship (STEM-OPT transfer / H-1B / TN / future green card)
- Medical, dental, vision, 401(k), generous PTO, inventor cash awards
Why Join Us
- Work on once-in-a-decade tech: ultra-efficient, body-centric communication
- Lead IC engineering at a company where your designs will ship quickly and globally
- Collaborate with pioneers in wireless, chip, and embedded system design
- Build a legacy team and define a new category of computing
Keywords
Semiconductor, Wi-R, Startup, Analog IC Design, Mixed-Signal Engineering, RF Systems, SoC Architecture, Chip Tapeout, Low-Power Design, Wireless Communication, Engineering Leadership, ASIC Development, Wearable Technology
#J-18808-LjbffrVP Engineering, IC Design in west lafayette at Unknown Company
This position is listed as full time and onsite.