VLSI RTL Design Engineer — High-Performance Cache & Fabric

AMD's Cores Organization seeks an experienced VLSI RTL design engineer to invent and implement high-performance Cache and Routing Fabric designs. The role is based in Fort Collins, CO, with potential relocation or travel to Austin, TX.

You will work with Cache and CPU Architects and collaborate across Design Verification, Physical Design, and Test teams. The ideal candidate has strong Verilog HDL skills, Digital RTL design experience, and a track record of cross-functional collaboration on