Timing Methodology Engineer – SOC & 3D IC Signoff

Broadcom Inc. is seeking an experienced engineer to advance timing sign-off methodologies for SOC and 3D/2.5D IC design. The role requires ownership of timing signoff and collaboration across teams in a fast-paced project environment.

You will deploy methodologies, lead EDA flow with Primetime, Tempus and Innovus, and contribute to silicon technology yield and testability improvements.