A leading technology recruitment firm is seeking a SystemC / TLM Verification Engineer to support pre-silicon modeling and validation for advanced SoC platforms. The ideal candidate will develop SystemC models, validate performance, and collaborate with cross-functional teams. Strong experience with SystemC, TLM2.0, and C++ is essential. This mid-senior level role offers a competitive pay rate from $50 to $60 per hour and is an on-site contract position in Santa Clara, CA.
#J-18808-Ljbffr
#J-18808-Ljbffr
SystemC/TLM Verification Engineer (Pre-Silicon Modeling) in santa clara at Unknown Company
This position is listed as contract and onsite.