Staff Verification Engineer - CHI Interconnect

SiFive is seeking a Staff Design Verification Engineer in Boston to drive verification of a next-generation cache-coherent interconnect with CHI-based architecture. You will define verification strategy, build robust environments, and collaborate across architecture, design and software teams to close gaps early.

The role requires 7+ years in ASIC/SoC verification, strong SystemVerilog skills, and deep knowledge of cache-coherent systems.