Renesas Electronics Corporation invites an experienced Staff Design Verification Engineer to join our memory interface team. You will verify DDR6 and future generations, develop UVM-based verification environments, and drive coverage and quality for high-speed memory blocks.
Ideal candidates have 8+ years in semiconductor design verification, SystemVerilog expertise, and strong problem-solving skills. This role collaborates with design and software teams to deliver robust, verifiable memory
#J-18808-LjbffrStaff Design Verification Architect - DDR6/UVM in duluth at Unknown Company
This position is listed as full time and onsite.