SiFive, the pioneer of RISC-V, seeks a Staff Design Verification Engineer to drive verification of high-performance CPU cores, focusing on RVV and vector microarchitecture.
In this staff role, you will own verification across frontend, midcore, load-store, and vector unit interactions, collaborating with architecture, RTL, and performance teams to ensure robust verification and sign-off.
#J-18808-LjbffrStaff CPU Core DV Engineer: RVV Vector & OoO in austin at Unknown Company
This position is listed as full time and onsite.