Staff Clock Architect for High-Performance ASICs

Qualcomm Technologies, Inc. is seeking a senior Clock Physical Design Engineer in Austin, TX. You will own clock PD methodology, implement advanced clock structures, and drive signoff across NSP ASIC/SoC designs.

The role requires 10+ years in ASIC/SoC physical design with hands-on experience in clock distribution, SPICE analysis, and multi-tool signoff. Collaboration across PD, timing, power, PLL, and CAD teams is essential.