SoC Verification Engineer (RISC-V, IP & Tooling)

InspireSemi is seeking a SoC Design Verification Engineer to verify a high-performance SoC with RISC-V core, interconnect, and peripheral IPs. You will develop verification plans, build testbenches, and ensure design quality before tape-out.

The role requires 5+ years in ASIC/SoC verification, expertise in SystemVerilog/UVM, and strong scripting. Collaboration with RTL and software teams is essential. Hybrid work in Austin with strong compensation and equity.