SoC RTL Design Engineer for High-Performance SSDs

SK hynix memory solutions America Inc. is seeking an accomplished RTL design engineer to join the System on Chip (SoC) Design Team in San Jose.

You will contribute across the design cycle, from micro-architecture and RTL coding to timing closure and tapeout readiness for high‑performance SSDs and AI storage solutions. You will collaborate with Design Verification, Silicon Validation and Firmware groups, focusing on Verilog/SystemVerilog RTL, AMBA/PCIe/NAND/DDR protocols, and scripting in Python.