Apple is seeking an engineer in the Silicon Engineering group to model power dissipation and DVFS points for SOC IPs, including AI/ML accelerators. You will work with architecture, design, thermals, PMIC and system teams to optimize power profiles and ensure model correlation with hardware data.
The role emphasizes scripting, data analysis, and familiarity with low-power digital design and CMOS technology to drive energy-efficient silicon for Apple products.
#J-18808-LjbffrSoC Power Modeling Engineer – AI/ML & Power Optimization in austin at Unknown Company
This position is listed as full time and onsite.