Silicon Verification Engineer (SystemVerilog, ABV)

MatX is hiring silicon verification engineers to build best-in-class silicon for high-performance GenAI. You will contribute to scalable verification across blocks and fullchip, owning verification at subsystem and chip level and delivering tests and coverage closure.

You will work with SystemVerilog, Python, C/C++, Bluespec and ABV/UVM in a fast-paced environment. Prior silicon bring-up and debugging experience is a plus.