MatX Inc. is building a cutting-edge silicon design-for-test (DFT) engineering team in Mountain View to enable high-performance GenAI silicon.
You will implement DFT functions for SERDES PHY, integrate DFT patterns, and develop firmware loading flows for PHY bring-up, collaborating across verification, firmware, and test teams to ensure robust silicon test programs from simulation to ATE. Ideal candidates have hands-on DFT experience (MBIST, at-speed test), knowledge of JTAG/IJTAG, and
#J-18808-LjbffrSilicon DFT Engineer — Remote, Equity in mountain view at Unknown Company
This position is listed as full time and onsite.