Senior Verification Engineer - Mixed-Signal ICs

A leader in silicon design is looking for an experienced Design Verification Engineer in Chandler, Arizona. You will collaborate with cross-functional teams to ensure high-quality mixed-signal IC solutions through end-to-end functional verification. Candidates should have a background in electrical engineering, relevant experience in ASIC verification, and strong proficiency in Verilog and SystemVerilog. This role provides opportunities to work on advanced verification methodologies in a collaborative environment.
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