Senior Technologist Datapath Design Engineer and Circuit Design Engineer, VLSI Design Engineering

Senior Technologist Datapath Design Engineer and Circuit Design Engineer, VLSI Design EngineeringThe Memory Technology Group is at the core of the Legacy SanDisk Engineering Organization. We are building a cutting edge 3D memory in our multiple billion dollars Fab. Our memory provides performance, power, and endurance at a lower cost but on quality.

The Memory Technology organization is a strategic entity for the company, and we are growing. Our group functions as a start-up within Sandisk, and offers a creative, fast paced, entrepreneurial work environment where you'll be at the center of Sandisk innovation.If you thrive in a fast-paced, dynamic environment, are looking to be a part of a team that is developing exciting new processes, and you are eager to take on new opportunities and challenges with a sense of urgency and enthusiasm, then this could be an exciting opportunity for you.Essential Duties and Responsibilities:Architect and design circuits at transistor level and gate level for leading-edge 3D NAND flash memory focusing on high-speed datapath circuit design and page buffers design.Perform block level and full chip circuit simulations to meet all performance specifications.RTL design, synthesis, static timing analysis and verification in verilog for page buffer and data path control logics.Conduct silicon debugging and evaluation with micro-probing.Collaborate with characterization engineers to fully characterize silicon, and partner with other designers to develop solutions for silicon issues.Generate detailed technical reports and presentations.Required:Master's degree in Electrical Engineering or equivalent with 15 or more years of relevant experience.Knowledge and/or experience in data path design (Nand, DRAM, LPDDR or HBM)Knowledge in decoding concept and redundancy conceptKnowledge in Nand page buffer designKnowledge in RTL designKnowledge and/or experience in non-volatile memory design (NAND flash memory cell operation in particular) is a big advantageKnowledge and/or experience in High speed I/O circuit is a big plusA strong device background and experience with evaluating new process technologies for use in design is preferred.