Developing and executing tests for collective communication operations, the full-time Senior Technical Lead, Validation will focus on validating custom networking silicon for AI training workloads while collaborating with cross-functional teams in a remote environment. Key Responsibilities Develop test suites for collective operations targeting Trantor ASIC across emulation, FPGA, and silicon platforms Write RDMA verbs-level tests covering various scenarios using the RoCE Verbs Testing Framework Validate multi-node collective communication patterns and integrate tests into CI/CD pipelines Required Qualifications B.S./M.S. in Computer Science, Electrical Engineering, Computer Engineering, or related field Expert proficiency in C/C++ and strong proficiency in Python Deep understanding of RDMA operations and RoCE v2 protocols Experience with collective communication operations and Ethernet/L2 networking fundamentals Familiarity with PCIe architecture and NVIDIA Collective Communications Library or equivalent