Akkodis is seeking an experienced Senior SRAM Layout Design Engineer to join a world-class semiconductor team in Santa Clara, CA on a contract basis. You will own the complete custom layout development of SRAM bitcell arrays, memory periphery, and memory macros, including floorplanning and top-level verification.
Required: 10+ years in Custom IC Layout, Cadence Virtuoso, Calibre/ICV experience, and strong floorplanning skills.
#J-18808-LjbffrSenior SRAM Layout Designer for Advanced Memory IP in fremont at Unknown Company
This position is listed as contract and onsite.