Apple, Inc. in Austin is seeking a senior Design Verification Engineer to lead verification for cellular System-on-Chips.
You will craft reusable UVM test benches, build coverage-driven plans, and collaborate with multiple teams to ensure high-quality tape-out readiness across advanced cellular SoCs. Ideal candidates have 10+ years in verification, strong OO programming skills (Python/C++/Java/SystemVerilog), and hands-on experience with UVM-based environments and IP-level verification.
#J-18808-LjbffrSenior SoC Verification Engineer - UVM & IP Integration in austin at Unknown Company
This position is listed as full time and onsite.