Velaura is building next-generation Physical AI SoCs and seeks a senior Design Verification Engineer. You will verify and deliver complex hardware and software systems from RTL through tape-out, collaborating with architects, RTL and software engineers, and system teams.
The role focuses on system-level verification of boot, root of trust, clock/topology, low power, and IO/memory subsystems. Sign-off, coverage closure and tape-out readiness are key milestones.
#J-18808-LjbffrSenior SoC Verification Engineer – System-Level in santa clara at Unknown Company
This position is listed as full time and onsite.