Senior SoC Timing & Clocking Engineer (Hybrid)

Intel Corporation in the United States is seeking a Physical Design Timing Engineer to ensure robust timing, power efficiency, and performance for next‑generation SoCs. You will collaborate with cross‑functional teams to develop timing methodologies and optimize clock networks.

You will generate timing constraints, perform analysis, and drive flow improvements across chip and block levels, with a focus on high‑performance, low‑power designs in hybrid work environments.