Velaura AI, Inc. is seeking an experienced Design Verification Engineer focusing on system-level verification for its Physical AI SoC. You will verify boot flows, security state transitions, and IO/memory subsystems across typical workloads.
The role requires leadership in verification projects and hands-on experience with CDC/RDC tools, low power flows, and emulation or FPGA prototyping to accelerate tape-out readiness.
#J-18808-LjbffrSenior SoC SystemVerilog Verification Engineer in santa clara at Unknown Company
This position is listed as full time and onsite.