Annapurna Labs (U.S.) Inc. in the United States is seeking an ASIC Physical Design Engineer to lead floorplanning, placement, and tapeout for advanced silicon used in AWS data centers.
You will collaborate with the front-end team to optimize RTL impact on physical design and apply robust verification workflows. The role requires strong scripting skills and hands-on experience with FC/Innovus, Calibre, IC Validator and PVS, plus a track record of successful tape-outs.
#J-18808-LjbffrSenior SOC Physical Design Engineer - Tapeout Expert in austin at Unknown Company
This position is listed as full time and onsite.