Senior SOC Physical Design Architect (Power & Timing)

Qualcomm in Austin, Texas is seeking a Physical Design Engineer to lead high-speed DDR and graphics design efforts. This role demands a solid educational foundation in Electrical Engineering, with a preference for a Master's Degree and relevant experience. The position focuses on optimizing power utilization and conducting thorough physical verification checks.

The ideal candidate will have experience with floor planning, place and route, and timing analysis. The competitive salary range for this position is $161,179 to $210,000 per year, reflecting the critical nature of these contributions to our projects.