Senior SoC Design Engineer — ARM/PCIe RTL

Arm is seeking a senior design engineer in Austin, Texas, to contribute to micro-architecture and RTL development for complex compute subsystems and SoCs. You will design, implement, and verify RTL, collaborate with verification and backend teams, and help set design specs and timing closure.

Ideal candidates have 7+ years in SoC design, strong Verilog HDL skills, and experience with PCIe, DDR/LPDDR, HBM, UCIe, and Ethernet.