NVIDIA Corporation is seeking a Senior Signal Integrity Engineer to design and optimize high-frequency channels up to 400 Gb/s per lane for PCBs, packages, connectors and cables. You will establish layout guidelines for NVIDIA systems and work on both design and verification to ensure robust PHY performance.
The role requires deep EM knowledge, hands-on lab experience with VNA and TDR, and proficiency with tools like Ansys EM and CST.
#J-18808-LjbffrSenior SI Engineer 400Gb/s PHY Design (Equity) in santa clara at Unknown Company
This position is listed as full time and onsite.