Apple Inc. in Cupertino, California, is seeking a SerDes System Validation Engineer to lead system validation of mixed-signal SerDes IP across SoC and PHY contexts.
You will collaborate with Analog-Mixed/Signal design teams to validate embedded circuits and ensure first-time silicon success while delivering high-quality IP for Apple’s products. Ownership of SerDes bring-up, validation and debug, plus defining DFT needs and working with design teams to analyze robustness and margins.
#J-18808-LjbffrSenior SerDes System Validation Engineer – High-Speed Links in northern at Unknown Company
This position is listed as full time and onsite.