Jobtailor is seeking a senior yield engineer to optimize CMOS/memory fabrication yields. You will analyze ATE data, correlate bench tests, and own yield roadmaps while guiding cost reduction and device performance improvements.
Collaborate with foundries, contract manufacturers, and internal DFT/test teams to set specs, optimize test flows, and transition NPI to high-volume production using robust DFM practices.
#J-18808-LjbffrSenior Semiconductor Yield Engineer — 7nm, ATE & NPI Leader in california at Unknown Company
This position is listed as contract and onsite.