Senior RTL2GDS Methodology Architect (Equity Eligible)

NVIDIA is seeking an experienced ASIC Implementation Engineer in Santa Clara to own the RTL2GDS methodology for advanced CPU builds. You will evaluate EDA tools, define standards, and lead automation efforts to boost PPA across the design cycle.

Responsibilities include driving flow optimization, conducting QoR experiments, and collaborating with architecture, RTL, DFT, and physical teams to maximize silicon performance. The role emphasizes scripting, data-driven analysis, and vendor interaction.