MediaTek in Austin is seeking a Senior RTL Design Engineer to lead RTL development for complex IP and ARM CPU subsystems. The role involves defining micro-architecture, ensuring RTL quality, and collaborating with worldwide teams. The ideal candidate has 8+ years of experience in RTL design, strong skills in SystemVerilog and Verilog, and a significant background in ARM CPU architecture. The position offers a competitive salary and comprehensive benefits including health insurance and a 401(k).
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