Samsung Semiconductor in San Jose, CA seeks an experienced hardware design engineer to develop memory-centric IP using Verilog, SystemVerilog and HLS, focusing on performance, power, and area.
You will collaborate with verification and design teams, requiring 5+ years in RTL design for complex IPs and expertise in memory controller IP and AI/ML workloads. Competitive pay and onsite facilities provided.
#J-18808-LjbffrSenior RTL IP Engineer - Memory-Centric AI/ML in san jose at Unknown Company
This position is listed as full time and onsite.